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Implementation of user interface for Microprocessor Trainer
http://hdl.handle.net/20.500.12678/0000006962
http://hdl.handle.net/20.500.12678/0000006962534fd5c2-2752-44af-90a0-9e92b16c5f70
e86e1789-b884-4900-9847-bc0dfeb289da
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Journal article | ||||||
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Publication | ||||||
Title | ||||||
Title | Implementation of user interface for Microprocessor Trainer | |||||
Language | en | |||||
Publication date | 2011-07-15 | |||||
Authors | ||||||
Tin Mar Kyi | ||||||
Description | ||||||
This paper aims to design and construct the microcontroller-based user interface system and to study input, computation, and output for microprocessor trainer. The other two activities beyond computation: input and output or I/O. This paper also aims to do high quality research in the area of file systems, as well as develop a good implementation on at least one computer system. A computer system's I/O performance must be commensurate (equal) with its CPU performance if the I/O system is not to limit the system's total throughput. When hundreds to thousands of such high performance micro-processors are closely connected in scalable array architecture, the enormous CPU performance of the multi-computer requires an I/O system with correspondingly high performance. A well balanced computer requires I/O performance commensurate with its CPU performance. High performance computers, access large numbers of disks in parallel to achieve the very appreciable I/O performance . |
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Keywords | ||||||
I/O unit, Microprocessor Trainer, PIC16F877A microcontroller, 7-segments, 74ALS573BS, 74LS244, two ULN 2004A | ||||||
Journal articles | ||||||
International Journal of Information Technology Convergence and Services(IJITCS) | ||||||
p. 375 | ||||||
Vol - 1 No.4 |