{"created":"2020-12-21T08:12:54.232586+00:00","id":6962,"links":{},"metadata":{"_buckets":{"deposit":"e86e1789-b884-4900-9847-bc0dfeb289da"},"_deposit":{"created_by":92,"id":"6962","owner":"92","owners":[92],"owners_ext":{"displayname":"","email":"khin_sandar_chit@miit.edu.mm","username":""},"pid":{"revision_id":0,"type":"depid","value":"6962"},"status":"published"},"_oai":{"id":"oai:meral.edu.mm:recid/00006962","sets":["1582963674932:1597397014014"]},"communities":["miit"],"item_1583103067471":{"attribute_name":"Title","attribute_value_mlt":[{"subitem_1551255647225":"Implementation of user interface for Microprocessor Trainer","subitem_1551255648112":"en"}]},"item_1583103085720":{"attribute_name":"Description","attribute_value_mlt":[{"interim":"This paper aims to design and construct the microcontroller-based user interface system and to study\ninput, computation, and output for microprocessor trainer. The other two activities beyond computation:\ninput and output or I/O. This paper also aims to do high quality research in the area of file systems, as\nwell as develop a good implementation on at least one computer system. A computer system's I/O\nperformance must be commensurate (equal) with its CPU performance if the I/O system is not to limit the\nsystem's total throughput. When hundreds to thousands of such high performance micro-processors are\nclosely connected in scalable array architecture, the enormous CPU performance of the multi-computer\nrequires an I/O system with correspondingly high performance. A well balanced computer requires I/O\nperformance commensurate with its CPU performance. High performance computers, access large\nnumbers of disks in parallel to achieve the very appreciable I/O performance ."}]},"item_1583103108160":{"attribute_name":"Keywords","attribute_value_mlt":[{"interim":"I/O unit"},{"interim":"Microprocessor Trainer"},{"interim":"PIC16F877A microcontroller"},{"interim":"7-segments"},{"interim":"74ALS573BS"},{"interim":"74LS244"},{"interim":"two ULN 2004A"}]},"item_1583103120197":{"attribute_name":"Files","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_access","date":[{"dateType":"Available","dateValue":"2020-12-21"}],"displaytype":"preview","filename":"Implementation of user interface for Microprocessor Trainer.pdf","filesize":[{"value":"195 KB"}],"format":"application/pdf","url":{"url":"https://meral.edu.mm/record/6962/files/Implementation of user interface for Microprocessor Trainer.pdf"},"version_id":"fdaa3525-04ad-462f-abc3-f4d0c3d3f96e"}]},"item_1583103131163":{"attribute_name":"Journal articles","attribute_value_mlt":[{"subitem_journal_title":"International  Journal of Information Technology Convergence and Services(IJITCS)","subitem_pages":"p. 375","subitem_volume":"Vol - 1 No.4"}]},"item_1583105942107":{"attribute_name":"Authors","attribute_value_mlt":[{"subitem_authors":[{"subitem_authors_fullname":"Tin Mar Kyi"}]}]},"item_1583108359239":{"attribute_name":"Upload type","attribute_value_mlt":[{"interim":"Publication"}]},"item_1583108428133":{"attribute_name":"Publication type","attribute_value_mlt":[{"interim":"Journal article"}]},"item_1583159729339":{"attribute_name":"Publication date","attribute_value":"2011-07-15"},"item_title":"Implementation of user interface for Microprocessor Trainer","item_type_id":"21","owner":"92","path":["1597397014014"],"publish_date":"2020-12-21","publish_status":"0","recid":"6962","relation_version_is_last":true,"title":["Implementation of user interface for Microprocessor Trainer"],"weko_creator_id":"92","weko_shared_id":-1},"updated":"2021-12-13T01:59:36.832346+00:00"}