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  1. Yadanabon University
  2. Department of Physics

Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter

http://hdl.handle.net/20.500.12678/0000000287
7d28356b-ec47-4b46-b030-fec812e2903f
a81fc286-6fc4-4cf6-9e3f-041bf6b479f9
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Design Design and Implementation of FPGA-Based.pdf (338 Kb)
Publication type Journal article
Upload Type Publication
Title
Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter
en
Publication date 2019
Authors
Yi Yi Swe
Description
The FPGA-based 3-digit 7-segments LED display counter is designed and constructed by using
Altera’s Cyclone FPGA, 3-digit 7-segments LED display and other supported electronic
components. The core FPGA board based on Cyclone IV FPGA is used as the main control
unit. The FPGA board is programmed by using VHDL (Very high speed integrated circuit
Hardware Description Language) language. The peripheral circuits (such as switch input
circuit, LED display circuit, 7-segments LED display) are also constructed to test the function
of the FPGA and VHDL language. Finally, the constructed display counter is tested by writing
various programs and downloading the file into the FPGA board. The constructed board can
count numbers “000” up to “999”. It can be used in various fields such as count up, count
down, stop watch and other counting applications.
Keywords
FPGA
Journal articles
1
Yadanabon University Research Journal
10
Conference papaers
Books/reports/chapters
Thesis/dissertations
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