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Item
{"_buckets": {"deposit": "a81fc286-6fc4-4cf6-9e3f-041bf6b479f9"}, "_deposit": {"id": "287", "owners": [], "pid": {"revision_id": 0, "type": "recid", "value": "287"}, "status": "published"}, "_oai": {"id": "oai:meral.edu.mm:recid/287"}, "control_number": "287", "item_1583103067471": {"attribute_name": "Title", "attribute_value_mlt": [{"subitem_1551255647225": "Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter", "subitem_1551255648112": "en"}]}, "item_1583103085720": {"attribute_name": "Description", "attribute_value_mlt": [{"interim": "The FPGA-based 3-digit 7-segments LED display counter is designed and constructed by using\r Altera\u2019s Cyclone FPGA, 3-digit 7-segments LED display and other supported electronic\r components. The core FPGA board based on Cyclone IV FPGA is used as the main control\r unit. The FPGA board is programmed by using VHDL (Very high speed integrated circuit\r Hardware Description Language) language. The peripheral circuits (such as switch input\r circuit, LED display circuit, 7-segments LED display) are also constructed to test the function\r of the FPGA and VHDL language. Finally, the constructed display counter is tested by writing\r various programs and downloading the file into the FPGA board. The constructed board can\r count numbers \u201c000\u201d up to \u201c999\u201d. It can be used in various fields such as count up, count\r down, stop watch and other counting applications."}]}, "item_1583103108160": {"attribute_name": "Keywords", "attribute_value_mlt": [{"interim": "FPGA"}]}, "item_1583103120197": {"attribute_name": "Files", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_access", "date": [{"dateType": "Available", "dateValue": "2020-05-05"}], "displaytype": "preview", "filename": "Design and Implementation of FPGA-Based.pdf", "filesize": [{"value": "338 Kb"}], "format": "application/pdf", "licensetype": "license_free", "mimetype": "application/pdf"}]}, "item_1583103131163": {"attribute_name": "Journal articles", "attribute_value_mlt": [{"subitem_issue": "1", "subitem_journal_title": "Yadanabon University Research Journal", "subitem_volume": "10"}]}, "item_1583103147082": {"attribute_name": "Conference papaers", "attribute_value_mlt": [{}]}, "item_1583103211336": {"attribute_name": "Books/reports/chapters", "attribute_value_mlt": [{}]}, "item_1583103233624": {"attribute_name": "Thesis/dissertations", "attribute_value_mlt": [{"subitem_supervisor(s)": []}]}, "item_1583105942107": {"attribute_name": "Authors", "attribute_value_mlt": [{"subitem_authors": [{"subitem_authors_fullname": "Yi Yi Swe"}]}]}, "item_1583108359239": {"attribute_name": "Upload Type", "attribute_name_i18n": "Upload Type", "attribute_value": "Publication"}, "item_1583108428133": {"attribute_name": "Publication type", "attribute_name_i18n": "Publication type", "attribute_value": "Journal article"}, "item_1583159729339": {"attribute_name": "Publication date", "attribute_name_i18n": "Publication date", "attribute_value": "2019"}, "item_1583159847033": {"attribute_name": "Identifier", "attribute_value": "https://oar.ydbu.edu.mm/handle/123456789/304"}, "item_title": "Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter", "item_type_id": "20", "owner": "1", "path": ["1582963788001/1582966489046"], "permalink_uri": "http://hdl.handle.net/20.500.12678/0000000287", "pubdate": {"attribute_name": "Deposited date", "attribute_value": "2020-03-05"}, "publish_date": "2020-03-05", "publish_status": "0", "recid": "287", "relation": {}, "relation_version_is_last": true, "title": ["Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter"], "weko_shared_id": -1}
Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter
Permalink :
http://hdl.handle.net/20.500.12678/0000000287
7d28356b-ec47-4b46-b030-fec812e2903f
a81fc286-6fc4-4cf6-9e3f-041bf6b479f9
| Name / File | License | Actions | |
|---|---|---|---|
 Design and Implementation of FPGA-Based.pdf (337.9 kB)
sha256: 8938b7945ef367bdd4bdddaacb6c48a90fa202fbda6addfe04b7d4a08c4819f7 |
|
| Publication type |
{"attribute_name": "Publication type", "attribute_name_i18n": "Publication type", "attribute_value": "Journal article"}
Journal article
|
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|---|---|---|---|---|---|---|
| Upload Type |
{"attribute_name": "Upload Type", "attribute_name_i18n": "Upload Type", "attribute_value": "Publication"}
Publication
|
|||||
| Title |
{"attribute_name": "Title", "attribute_name_i18n": "Title", "attribute_type": null, "attribute_value_mlt": [[[{"Title": "Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter"}], [{"Language": "en"}]]]}
|
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| Title | Design and Implementation of FPGA-Based 3-Digit 7-Segments LED Display Counter | |||||
| Language | en | |||||
| Publication date |
{"attribute_name": "Publication date", "attribute_name_i18n": "Publication date", "attribute_value": "2019"}
2019
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| Authors |
{"attribute_name": "Authors", "attribute_name_i18n": "Authors", "attribute_type": null, "attribute_value_mlt": [[[{" ": [[[{"Full name": "Yi Yi Swe"}]]]}]]]}
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| Full name | Yi Yi Swe | |||||
| Description |
{"attribute_name": "Description", "attribute_name_i18n": "Description", "attribute_type": null, "attribute_value_mlt": [[[{"": "The FPGA-based 3-digit 7-segments LED display counter is designed and constructed by using\r Altera\u2019s Cyclone FPGA, 3-digit 7-segments LED display and other supported electronic\r components. The core FPGA board based on Cyclone IV FPGA is used as the main control\r unit. The FPGA board is programmed by using VHDL (Very high speed integrated circuit\r Hardware Description Language) language. The peripheral circuits (such as switch input\r circuit, LED display circuit, 7-segments LED display) are also constructed to test the function\r of the FPGA and VHDL language. Finally, the constructed display counter is tested by writing\r various programs and downloading the file into the FPGA board. The constructed board can\r count numbers \u201c000\u201d up to \u201c999\u201d. It can be used in various fields such as count up, count\r down, stop watch and other counting applications."}]]]}
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| The FPGA-based 3-digit 7-segments LED display counter is designed and constructed by using Altera’s Cyclone FPGA, 3-digit 7-segments LED display and other supported electronic components. The core FPGA board based on Cyclone IV FPGA is used as the main control unit. The FPGA board is programmed by using VHDL (Very high speed integrated circuit Hardware Description Language) language. The peripheral circuits (such as switch input circuit, LED display circuit, 7-segments LED display) are also constructed to test the function of the FPGA and VHDL language. Finally, the constructed display counter is tested by writing various programs and downloading the file into the FPGA board. The constructed board can count numbers “000” up to “999”. It can be used in various fields such as count up, count down, stop watch and other counting applications. | ||||||
| Keywords |
{"attribute_name": "Keywords", "attribute_name_i18n": "Keywords", "attribute_type": null, "attribute_value_mlt": [[[{"": "FPGA"}]]]}
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| FPGA | ||||||
| Files |
{"attribute_name": "Files", "attribute_name_i18n": "Files", "attribute_type": "file", "attribute_value_mlt": [[[[{"value": "338 Kb"}]], [[{"dateType": "Available", "dateValue": "2020-05-05"}]], {"accessrole": "open_access", "accessrole.name": "Access Type", "displaytype": "preview", "displaytype.name": "Display Type", "filename": "Design and Implementation of FPGA-Based.pdf", "filename.name": "Display File", "format": "application/pdf", "licensetype": "license_free", "licensetype.name": "License", "mimetype": "application/pdf"}]]}
338 Kb2020-05-05 Available Design and Implementation of FPGA-Based.pdf application/pdf preview open_access application/pdf |
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| Journal articles |
{"attribute_name": "Journal articles", "attribute_name_i18n": "Journal articles", "attribute_type": null, "attribute_value_mlt": [[[{"Issue": "1"}], [{"Journal title": "Yadanabon University Research Journal"}], [{"Volume": "10"}]]]}
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| Issue | 1 | |||||
| Journal title | Yadanabon University Research Journal | |||||
| Volume | 10 | |||||
