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{"_buckets": {"deposit": "8103a5b1-c81b-402b-b6f3-0d8870ca75e8"}, "_deposit": {"id": "2614", "owners": [], "pid": {"revision_id": 0, "type": "recid", "value": "2614"}, "status": "published"}, "_oai": {"id": "oai:meral.edu.mm:recid/2614", "sets": ["user-uy"]}, "communities": ["ccm", "ccp", "kyauksetu", "ltc", "maas", "miit", "mlmu", "mmu", "mtlu", "mtu", "mub", "mude", "mufl", "pathein", "scu", "suoe", "tcu", "tgu", "tuh", "tum", "ucsm", "ucsmtla", "ucsmub", "ucspathein", "ucstaungoo", "ucsy", "udmm", "udmy", "uit", "um", "um1", "um2", "umkn", "umm", "uphy", "urj", "uvs", "uy", "yau", "ydbu", "ytu", "yude", "yueco", "yufl", "yuoe"], "control_number": "2614", "item_1583103067471": {"attribute_name": "Title", "attribute_value_mlt": [{"subitem_1551255647225": "CMOS DESIGN OF 0.25um CAPACITOR-LESS ALL DIGITAL CONTROLLER FOR A DC-DC BOOST CONVERTER", "subitem_1551255648112": "en"}]}, "item_1583103085720": {"attribute_name": "Description", "attribute_value_mlt": [{"interim": "A purely digital CMOS Design of a controller for a DC-DC Boost converter is presented in this paper using the 0.25um library. The circuit used PWM mode of control. In order to interface the booster analog output to the controller, a time based Analog to digital controller (ADC) is embedded in the design. The ADC also made use of purely digital components. With reference to [1] which used considerable capacitors, the entire design for the booster controller circuit in this paper did not use any capacitor.\r Figure 1 shows the general block diagram of the controller. The idea is to have a simple ADC architecture good enough for the booster. A time-based ADC is adopted for the design. The idea of time based ADC was found in [4]. Inside the ADC module is a voltage controlled oscillator (VCO) and a 5 bit counter. Figure 2 shows the general circuitry for the current starved ring oscillator [2] which made it possible to produce the digital output of the ADC by driving the counter at varying frequencies for every sampled output voltage. \r Because the target output voltage was set at 6V, the power transistor of the main booster circuit made use of another transistor model library. This is because the 0.25um library used for the controller is only limited to a maximum of 2.5Y. For the PWM block, it has two main parts, namely the buffer chain and the multiplexer. An input of 150 kHz, originating from the proposed circuit, is being fed to the buffer chain. Each stage of the buffer chain is being\r tapped to be the input of the 32x1 multiplexer. The output of the multiplexer and the 150 kHz signal is being fed to an XOR which is responsible for yielding the corresponding PWM signal.\r Simulation results reveal the booster output stabilizes at 6V for all the comer libraries. Line regulation simulation shows the output is stable for a VDD range of 2.3V to 2.5V. Load regulation simulation reveals the output is maintained at the target voltage of 6V when the load driven is a pair of series connected white LEDs or when the load is replaced by a resistor as low as 100 ohms. The circuit was likewise simulated for temperature variation from 0° to 70°. Data shows the output generally stable close to 6V."}]}, "item_1583103108160": {"attribute_name": "Keywords", "attribute_value_mlt": [{"interim": "current-starved oscillator"}]}, "item_1583103120197": {"attribute_name": "Files", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_access", "date": [{"dateType": "Available", "dateValue": "2020-05-05"}], "displaytype": "preview", "download_preview_message": "", "file_order": 0, "filename": "CMOS design of 0.52um capacitor-less all digital controller for A DC-DC Boost converter.pdf", "filesize": [{"value": "1005 Kb"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_free", "mimetype": "application/pdf", "size": 1005000.0, "url": {"url": "https://meral.edu.mm/record/2614/files/CMOS design of 0.52um capacitor-less all digital controller for A DC-DC Boost converter.pdf"}, "version_id": "2d1ded4c-47c7-426d-af86-9f6b7673b9b4"}]}, "item_1583103131163": {"attribute_name": "Journal articles", "attribute_value_mlt": [{"subitem_journal_title": "8th AUN/SEED-Net Regional Conference on Electrical and Electronics Engineering"}]}, "item_1583103147082": {"attribute_name": "Conference papaers", "attribute_value_mlt": [{}]}, "item_1583103211336": {"attribute_name": "Books/reports/chapters", "attribute_value_mlt": [{}]}, "item_1583103233624": {"attribute_name": "Thesis/dissertations", "attribute_value_mlt": [{"subitem_supervisor(s)": []}]}, "item_1583105942107": {"attribute_name": "Authors", "attribute_value_mlt": [{"subitem_authors": [{"subitem_authors_fullname": "Telan, Julio"}, {"subitem_authors_fullname": "Yap, Roderick"}, {"subitem_authors_fullname": "Castillo, Frank"}, {"subitem_authors_fullname": "Gebana, Aaron"}, {"subitem_authors_fullname": "Ramos, Marion"}, {"subitem_authors_fullname": "Santiago, Alec"}]}]}, "item_1583108359239": {"attribute_name": "Upload type", "attribute_value_mlt": [{"interim": "Other"}]}, "item_1583108428133": {"attribute_name": "Publication type", "attribute_value_mlt": [{"interim": "Other"}]}, "item_1583159729339": {"attribute_name": "Publication date", "attribute_value": "2015"}, "item_1583159847033": {"attribute_name": "Identifier", "attribute_value": "https://uyr.uy.edu.mm/handle/123456789/449"}, "item_title": "CMOS DESIGN OF 0.25um CAPACITOR-LESS ALL DIGITAL CONTROLLER FOR A DC-DC BOOST CONVERTER", "item_type_id": "21", "owner": "1", "path": ["1582967549708"], "permalink_uri": "http://hdl.handle.net/20.500.12678/0000002614", "pubdate": {"attribute_name": "Deposited date", "attribute_value": "2020-03-05"}, "publish_date": "2020-03-05", "publish_status": "0", "recid": "2614", "relation": {}, "relation_version_is_last": true, "title": ["CMOS DESIGN OF 0.25um CAPACITOR-LESS ALL DIGITAL CONTROLLER FOR A DC-DC BOOST CONVERTER"], "weko_shared_id": -1}
CMOS DESIGN OF 0.25um CAPACITOR-LESS ALL DIGITAL CONTROLLER FOR A DC-DC BOOST CONVERTER
http://hdl.handle.net/20.500.12678/0000002614
http://hdl.handle.net/20.500.12678/0000002614bef232bc-e026-4448-927f-ab7c40302d53
8103a5b1-c81b-402b-b6f3-0d8870ca75e8
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Title | ||||||
Title | CMOS DESIGN OF 0.25um CAPACITOR-LESS ALL DIGITAL CONTROLLER FOR A DC-DC BOOST CONVERTER | |||||
Language | en | |||||
Publication date | 2015 | |||||
Authors | ||||||
Telan, Julio | ||||||
Yap, Roderick | ||||||
Castillo, Frank | ||||||
Gebana, Aaron | ||||||
Ramos, Marion | ||||||
Santiago, Alec | ||||||
Description | ||||||
A purely digital CMOS Design of a controller for a DC-DC Boost converter is presented in this paper using the 0.25um library. The circuit used PWM mode of control. In order to interface the booster analog output to the controller, a time based Analog to digital controller (ADC) is embedded in the design. The ADC also made use of purely digital components. With reference to [1] which used considerable capacitors, the entire design for the booster controller circuit in this paper did not use any capacitor. Figure 1 shows the general block diagram of the controller. The idea is to have a simple ADC architecture good enough for the booster. A time-based ADC is adopted for the design. The idea of time based ADC was found in [4]. Inside the ADC module is a voltage controlled oscillator (VCO) and a 5 bit counter. Figure 2 shows the general circuitry for the current starved ring oscillator [2] which made it possible to produce the digital output of the ADC by driving the counter at varying frequencies for every sampled output voltage. Because the target output voltage was set at 6V, the power transistor of the main booster circuit made use of another transistor model library. This is because the 0.25um library used for the controller is only limited to a maximum of 2.5Y. For the PWM block, it has two main parts, namely the buffer chain and the multiplexer. An input of 150 kHz, originating from the proposed circuit, is being fed to the buffer chain. Each stage of the buffer chain is being tapped to be the input of the 32x1 multiplexer. The output of the multiplexer and the 150 kHz signal is being fed to an XOR which is responsible for yielding the corresponding PWM signal. Simulation results reveal the booster output stabilizes at 6V for all the comer libraries. Line regulation simulation shows the output is stable for a VDD range of 2.3V to 2.5V. Load regulation simulation reveals the output is maintained at the target voltage of 6V when the load driven is a pair of series connected white LEDs or when the load is replaced by a resistor as low as 100 ohms. The circuit was likewise simulated for temperature variation from 0° to 70°. Data shows the output generally stable close to 6V. |
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Keywords | ||||||
current-starved oscillator | ||||||
Identifier | https://uyr.uy.edu.mm/handle/123456789/449 | |||||
Journal articles | ||||||
8th AUN/SEED-Net Regional Conference on Electrical and Electronics Engineering | ||||||
Conference papaers | ||||||
Books/reports/chapters | ||||||
Thesis/dissertations |