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        <datestamp>2021-12-13T06:19:03Z</datestamp>
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          <dc:title>Evaluation of Matrix FMA Operation for Array Processor Using Free Cell Library</dc:title>
          <dc:creator>Yuichi, Okuyama</dc:creator>
          <dc:creator>Mitsuhiro, Nakamura</dc:creator>
          <dc:description>We implement new arithmetic unit for matrix operation named matrix FMA. This unit read three matrices at one cycle and output the result of &amp;#x1d434;&amp;#x1d435;+&amp;#x1d436;f in every cycle. We employ this unit to array processor for matrix multiplication and evaluate this unit in 45nm NanGate process. The result shows throughput become double though ×1.3 area penalty in the case of 4×4 matrix operation.</dc:description>
          <dc:date>2016-02-25</dc:date>
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